1. Field of the Invention
The present invention relates to an amplifier, and in particular, to a CMOS low noise amplifier (LNA) adaptable for use in a CMOS radio frequency (RF) communication system.
2. Background of the Related Art
Presently, CMOS low noise amplifiers (LNAs) are generally composed of a CMOS transistor and an on-chip inductor or an off-chip inductor. Such CMOS LNAs include common source type CMOS LNAs and common gate type CMOS LNAs. However, a completely CMOS LNA manufactured without an inductor has been a strong requirement previously lacking, for example, for use in a full CMOS radio frequency (RF) integrated communication system.
FIG. 1 is a diagram that illustrates a related art common source type CMOS LNA. As shown in FIG. 1, CMOS LNA 100 includes three spiral type inductors L1, L2 and L3, two transistors T1 and T2 and a capacitor C1. The first spiral inductor L1 receives an input signal RF IN at a first terminal, and the capacitor C1 is connected between a second terminal of the first spiral inductor L1 and a ground voltage. The LNA 100 further includes the second spiral inductor L2 connected by a first terminal to a power source voltage VDD, a third spiral inductor L3 coupled by a first terminal to the ground voltage and the drains of first and second transistors T1, T2 commonly coupled in series between the spiral inductors L2 and L3. A gate of the first transistor T1 is connected to receive a bias voltage BIAS, and a gate of the second transistor T2 is connected to the second terminal of the first spiral inductor L1. A source electrode of transistor T1 and the second terminal of spiral inductor L2 form an output node that outputs an output signal RF OUT.
FIG. 2 is a diagram that illustrates a related art common gate type CMOS LNA. As shown in FIG. 2, CMOS LNA 200 includes two spiral inductors L4 and L5, a capacitor C2 and a transistor T3. The LNA 200 includes a first spiral inductor L5 having a first terminal that receives an input signal RF IN and a second terminal connected to a ground voltage. A capacitor C2 is connected in parallel between the first terminal of the first spiral inductor L5 and the ground voltage. The second spiral inductor L4 is connected to a source electrode of a transistor T3 in series between a power source voltage VDD and the first terminal of the spiral inductor L5. The interconnection between the spiral inductor L4 and the transistor T3 forms an output node transmitting an output signal RF OUT. The gate electrode of the transistor T3 is connected to a bias voltage BIAS.
The related art CMOS LNAs have various disadvantages. When the inductance for the related art CMOS LNAs is implemented by using an on-chip inductor such as a spiral inductor, the on-chip spiral inductor cannot guarantee required performance characteristics and cannot provide acceptable yields during mass-production fabrication. When the inductance for the related art CMOS LNAs is an off-chip inductor element, the off-chip inductors can cause a more complicated fabrication process, board layout and generates cost-increment in an overall system such as a CMOS RF communication system. Further, required connections to off-chip elements reduce performance characteristics.
The above descriptions are incorporated by reference herein where appropriate for appropriate teachings of additional or alternative details, features and/or technical background.
An object of the invention is to solve at least the above problems, and/or disadvantages and to provide at least the advantages described hereinafter.
Another object of the present invention is to provide a LNA formed without an inductor.
Another object of the present invention is to provide a CMOS LNA formed without a spiral type on-chip inductor.
Another object of the present invention is to provide a reduced cost CMOS LNA.
Another object of the present invention is to provide a CMOS RF communication system using a LNA without an inductor.
Another object of the present invention is to provide a CMOS LNA having a simpler process for mass production and increased yield.
Another object of the present invention is to provide a CMOS LNA having first and second gain control stages.
Another object of the present invention is to provide a CMOS LNA having an increased dynamic range.
Another object of the present invention is to provide a CMOS LNA having first and second gain controlled stages each including first and second symmetric networks.
Another object of the present invention is to provide a CMOS LNA having first and second gain controlled stages each including first and second symmetric networks to allow a symmetric full-up and full-down operations.
To achieve at least the above objects and advantages in a whole or in parts and in accordance with the purpose of the present invention, as embodied and broadly described, there is provided a CMOS low noise amplifier (LNA) that includes a plurality of amplification stages coupled between an input terminal and an output terminal and a gain controller coupled to each of the plurality of amplifier stages, wherein the CMOS LNA does not include a spiral inductor.
To further achieve at least the above objects and advantages in a whole or in parts and in accordance with the purpose of the present invention, as embodied and broadly described, there is provided an amplification stage for a low noise amplifier (LNA) that includes first and second circuits coupled between an input node and an output node, wherein the first and second circuits have a symmetric configuration and a feedback loop coupled between the output node and the second circuit.
To further achieve at least the above objects and advantages in a whole or in parts and in accordance with the purpose of the present invention, as embodied and broadly described, there is provided a CMOS low noise amplifier (LNA) that includes a first amplifier stage that receives an input RF signal, wherein the first amplifier stage includes first and second symmetric networks and a feedback loop, a second amplifier stage coupled to an output node of the first amplifier stage, wherein the second amplifier stage includes the first and second symmetric networks and the feedback loop and a gain controller coupled to each of the first symmetric networks of the first and second amplifier stages, wherein the second amplifier stage transmits an amplified RF output signal responsive to a control signal of the gain controller.
To further achieve at least the above objects and advantages in a whole or in parts and in accordance with the purpose of the present invention, as embodied and broadly described, there is provided an RF CMOS communication system, that includes an antenna that receives RF signals having a carrier frequency, a phase lock loop that generates a local oscillator signal, a RF filter coupled to the antenna that filters the received RF signals, a demodulation mixer that mixes the filtered received RF signals with the local oscillator to output demodulated signals having a frequency reduced by the local oscillator, a modulation mixer that mixes the local oscillator signals with transmission data to modulate the transmission data, a power amplifier that amplifies the modulated transmission data and transmits the data to the transceiver for transmission and a CMOS low noise amplifier (LNA) coupled between the RF filter and the demodulation mixer that amplifies the filtered RF signals, wherein the CMOS LNA is formed without inductors.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.